As shown in FIGS. 1A and 1B, in the conventional semiconductor package, a lead frame 1 is constituted such that leads 3 extend in various directions form a pad 2 which is positioned at the center of the lead frame 1. Therefore, the number of the leads 3 has to be increased as the semiconductor chip follows the trend of higher integration. The leads 3 are connected by wires, i.e., wire-bonded, to a semiconductor chip 4 which is attached to the pad 2 by means of adhesives or the like. As the semiconductor chip 4 follows the trend of increasing concentrations, the size of the ship 4 is increased and accordingly, the number leads 3 is also increased. However, in order to mount a semiconductor chip 4 of increased capacity on the lead frame 1 of a limited size, the size of the pad 2 for mounting the semiconductor chip 4 has to be enlarged, while, in order to increase the number of the leads 3, the distances between the ends of the leads 3 and the pad 2 have to be increased.
Accordingly, there is a problem in that the increase of the size of the pad 2 causes the increase of the size of the semiconductor package 5. Further, an increase of the number of the leads 3 makes the gaps between the leads 3 narrower, with the result that the working dimensions allowance is too greatly reduced.
Further, as the distance between the pad 2 and the ends of the leads 3 is extended in correspondence with the increase in the number of the leads 3, the wire-bonding lengths are extended resulting in lowering wire-bonding efficiency as well as producing fragility. This in turn causes the bonded wires to become loosened and deformed, thereby producing contact of the leads are interconnected, circuits whereby the reliability of the products is deteriorated.